Resonant converter with capacitive mode detection and associated detection method

ABSTRACT

A method of capacitive mode detection is used in a resonant converter. The resonant converter has a square wave generator having a first switch and a second switch, a resonant network, an isolated transformer having a primary winding and a second winding, and a rectifier network providing an output DC voltage for a load. The method of capacitive mode detection includes: detecting a voltage of the secondary winding and generating a voltage detection signal; detecting an output DC voltage of the rectifier network and generating a voltage detecting threshold; comparing the voltage detection signal with the voltage detection threshold when either of the first and the second switches is turned OFF; generating a flag signal indicating whether the resonant converter enters into a capacitive mode based on the comparison result.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of CN application No.201410855769.1, filed on Dec. 31, 2014, and incorporated herein byreference.

TECHNICAL FIELD

The present invention refers to electrical circuit, to be more specificbut not exclusively refers to resonant converters with capacitive modedetection.

BACKGROUND

FIG. 1 illustrates a prior art half-bridge LLC resonant converter 100.The resonant converter 100 comprises a square wave signal generator 101,a resonant network 102, an isolated transformer T and a rectifiernetwork 103. The square wave signal generator 101 is built as ahalf-bridge type and comprises a high-side switch M1 and a low-sideswitch M2. The square wave signal generator 101 is configured to convertan input DC voltage V_(IN) into a square wave signal Vd by driving thehigh-side switch M1 and the low-side switch M2. The resonant network 102receives the square wave signal Vd and is coupled to the load throughthe rectifier network 103 to provide an output DC voltage Vo.

In prior art, the resonant converter with primary side control isconfigured to detect whether a capacitive mode or an inductor mode basedon phase difference between a primary input current Ip flowing into theresonant network 102 and the square wave signal Vd applied in theresonant network 102. FIGS. 2A and 2B illustrate schematic waveformdiagrams of the resonant converter 100 in the inductor mode andcapacitive mode, respectively. As shown in FIG. 2A, the primary inputcurrent Ip lags the square wave signal Vd, the resonant converter 100works in the inductive mode, the high-side switch M1 can be turned ON atzero voltage. As shown in FIG. 2B, the primary input current Ip leadsthe square wave signal Vd, the resonant converter 100 works in thecapacitive mode, the body diode of the high-side switch M1 presentsreverse-recovery because of the hard switching, that causes high powerdissipation. Furthermore, the slow reverse recovery may allow severeshoot-through of the high-side switch M1 and the low-side switch M2,resulting in high current spikes and causing the switches to fail.However, the prior mode detection method is hard to apply in theresonant converter with a secondary side control.

SUMMARY

The embodiments of the present invention are directed to a resonantconverter comprising a square wave generator, a resonant network, anisolated transformer, a rectifier network, a voltage detection circuit,a capacitive mode judge circuit and a switching frequency controller.The square wave generator comprises a first switch and a second switchcontrolled by a first and a second control signals respectively, thesquare wave generator is configured to convert an input DC voltage intoa square wave signal according to switching operations of the twoswitches. The resonant network is coupled to the square wave generatorto receive the square wave signal. The isolated transformer has aprimary winding coupled to the resonant network and a secondary winding.The rectifier network is coupled to the secondary winding and providesan output DC voltage for a load at its output terminal. The voltagedetection circuit is coupled to the secondary winding to detect avoltage of the secondary winding and provides a voltage detectionsignal. The voltage detection circuit is further coupled to the outputterminal of the rectifier network to receive the output DC voltage andprovides a voltage detection threshold. The capacitive mode judgecircuit compares the voltage detection signal with the voltage detectionthreshold when either of the first switch and the second switch isturned OFF, and generates a flag signal indicating whether the resonantconverter enters into a capacitive mode. The switching frequencycontroller is configured to generate the first and the second controlsignals. The switching frequency controller increases the frequency ofthe first and the second control signals when the resonant converterenters into capacitive mode.

BRIEF DESCRIPTION OF THE DRAWINGS

Non-limiting and non-exhaustive embodiments are described with referenceto the following drawings.

FIG. 1 illustrates a prior art half-bridge LLC resonant converter 100.

FIGS. 2A and 2B illustrate schematic waveform diagrams of the resonantconverter 100 in the inductor mode and capacitive mode, respectively.

FIG. 3 illustrates a block diagram of a resonant converter 200 withcapacitive mode detection, according to an embodiment of the presentinvention.

FIG. 4 illustrates a circuit diagram of a resonant converter 300 withcapacitive mode detection, according to an embodiment of the presentinvention.

FIGS. 5A-5C illustrate working waveform diagrams for the resonantconverter 300 shown in FIG. 4 under different operation types, accordingto an embodiment of the present invention.

FIG. 6 illustrates a circuit diagram of a capacitive mode detectioncircuit used in the resonant converter 300 shown in FIG. 4 according toan embodiment of the present invention.

FIG. 7 illustrates a circuit diagram of a capacitive mode detectioncircuit used in the resonant converter 300 shown in FIG. 4 according toanother embodiment of the present invention.

FIGS. 8A-8C illustrate working waveform diagrams for the embodimentswith the reference in FIGS. 6 and 7 under different operation types,according to an embodiment of the present invention.

FIG. 9 illustrates a circuit diagram of a capacitive mode detectioncircuit used in the resonant converter 300 shown in FIG. 4 according toyet another embodiment of the present invention.

FIG. 10 illustrates a circuit diagram of a resonant converter 700 withcapacitive mode detection, according to an embodiment of the presentinvention.

FIGS. 11A and 11B illustrate working waveform diagrams for the resonantconverter 700 shown in FIG. 10 under different operation types,according to an embodiment of the present invention.

FIG. 12 illustrates a working-flow diagram of a method 800 of capacitivemode detection used in a resonant converter according to an embodimentof the present invention.

DETAILED DESCRIPTION

Reference will now be made in detail to the preferred embodiments of theinvention, examples of which are illustrated in the accompanyingdrawings. While the invention will be described in conjunction with thepreferred embodiments, it will be understood that they are not intendedto limit the invention to these embodiments. On the contrary, theinvention is intended to cover alternatives, modifications andequivalents, which may be included within the spirit and scope of theinvention as defined by the appended claims. Furthermore, in thefollowing detailed description of the present invention, numerousspecific details are set forth in order to provide a thoroughunderstanding of the present invention. However, it will be obvious toone of ordinary skill in the art that the present invention may bepracticed without these specific details. In other instances, well-knownmethods, procedures, components, and circuits have not been described indetail so as not to unnecessarily obscure aspects of the presentinvention.

The phrase “couple” includes direct connection and indirect connection.Indirect connection includes connection through conductor which hasresistance and/or parasitic parameters such as inductance andcapacitance, or connection through diode, and so on.

FIG. 3 illustrates a block diagram of a resonant converter 200 withcapacitive mode detection according to an embodiment of the presentinvention. The resonant converter 200 comprises a square wave signalgenerator 201, a resonant network 202, an isolated transformer T havinga primary winding and a secondary winding, a rectifier network 203, acapacitive mode detection circuit and a switching frequency controller206. The square wave signal generator 201 comprises a high-side switchand a low-side switch which are controlled respectively by a firstcontrol signal VG1 and a second signal VG2 with 50% duty cycle for eachcontrol signal. The square wave signal generator 201 is configured toconvert an input DC voltage V_(IN) into a square wave signal Vd bycontrolling the first control signal VG1 and the second control signalVG2. The resonant network 202 is coupled to the square wave signalgenerator 201 to receive the square wave signal Vd and is coupled to theprimary winding of the isolated transformer T. The rectifier network 203is coupled to the secondary winding of the isolated transformer T toprovide an output DC voltage Vo for a load at its output terminal.

The capacitive mode detection circuit comprises a voltage detectioncircuit 204 and a capacitive mode judge circuit 205. The voltagedetection circuit 204 is coupled to the secondary winding of theisolated transformer T to detect a voltage V_(S) of the secondarywinding and is configured to provide a voltage detection signal V_(S1).The voltage detection circuit 204 is further coupled to the outputterminal of the rectifier network 203 to receive the output DC voltageVo and provides a voltage detection threshold V_(th) based on the outputDC voltage Vo. The capacitive mode judge circuit 205 compares thevoltage detection signal V_(S1) with the voltage detection thresholdV_(th) when either of the first switch and the second switch is turnedOFF and generates a flag signal MC indicating whether the resonantconverter 200 enters into a capacitive mode based on the comparisonresult.

As shown in FIG. 3, the secondary winding of the isolated transformer Thas a first terminal S+ and a second terminal S−. In one embodiment, thevoltage V_(S) of the secondary winding may be the voltage of the firstterminal S+ of the secondary winding. In another embodiment, the voltageV_(S) of the secondary winding may be the voltage of the second terminalS+ of the secondary winding or the difference between the voltage of thefirst terminal S+ and second terminal S− of the secondary winding.

The switching frequency controller 206 is configured to provide thefirst control signal VG1 and the second control signal VG2. Theswitching frequency controller 206 is further coupled to the capacitivemode judge circuit 205 to receive the flag signal MC. When the flagsignal MC indicates the resonant converter 200 works in the inductivemode, the switching frequency of the resonant converter 200, i.e. thefrequency of the first control signal VG1 or the second control signalVG2, is controlled by the switching frequency controller 206 based on afeedback signal dependent on the output DC voltage Vo. When the flagsignal MC indicates the resonant converter 200 enters into thecapacitive mode, the frequency of the first control signal VG1 and thesecond control signal VG2 is increased by the switching frequencycontroller 206 in order to make the resonant converter 200 returns theinductive mode from the capacitive mode quickly.

FIG. 4 illustrates a circuit diagram of a resonant converter 300 withcapacitive mode detection, according to an embodiment of the presentinvention. As shown in FIG. 4, the resonant converter 300 comprises asquare wave signal generator 301, a resonant network 302, an isolatedtransformer T having a primary winding Np and secondary winding Ns, arectifier network 303, a capacitive mode detection circuit and aswitching frequency controller 306.

In the embodiment shown in FIG. 4, the square wave signal generator 301is built as half-bridge type and comprises a high-side switch M1 and alow-side switch M2 which are controlled respectively by a first controlsignal VG1 and a second signal VG2 with 50% duty cycle for each controlsignal. The square wave signal generator 301 is configured to convert aninput DC voltage V_(IN) into a square wave signal Vd by controlling thetwo complementary control signals VG1 and VG2. In another embodiment,the square wave signal generator 301 may be built as full-bridge type.

The resonant network 302 comprises a capacitor C_(S), a first inductorL_(S) and a second inductor L_(M), wherein the second inductor L_(M) iscoupled to the primary winding of the isolated transformer T inparallel, the second inductor L_(M) is the magnetizing inductance. Theresonant converter 300 has a first resonant frequency f_(r1) and asecond resonant frequency f_(r2). The first resonant frequency f_(r1) isdetermined by the resonance between the capacitor C_(S) and the firstinductor L_(S), the second resonant frequency f_(r2) is determined bythe resonance between the capacitor C_(S), the first inductor L_(S) andthe second inductor L_(M), which can be expressed as:

${f_{r\; 1} = \frac{1}{2\pi \sqrt{L_{s}C_{s}}}},{f_{r\; 2} = \frac{1}{2\pi \sqrt{\left( {L_{s} + L_{M}} \right)C_{s}}}}$

In the embodiment shown in FIG. 4, the rectifier network 303 is coupledto the secondary winding Ns and comprises a full-wave rectifier circuitand an output capacitor Co. The full-wave rectifier circuit comprises afirst rectifying diode D1 and a second rectifying diode D2. The anode ofthe first rectifying diode D1 is coupled to the first terminal S+ of thesecondary winding, the anode of the second rectifying diode D2 iscoupled to the second terminal S− of the secondary winding. The outputcapacitor Co has s first terminal and a second terminal, wherein thefirst terminal is coupled to the cathode of the first rectifying diodeD1, the second terminal is coupled to a secondary ground. In otherembodiments, the rectifier network 303 may be configured in otherstructure.

The capacitive mode detection circuit comprises a voltage detectioncircuit 304 and a capacitive mode judge circuit 305. In the embodimentshown in FIG. 4, the voltage detection circuit 304 is coupled to thefirst terminal S+ of the secondary winding and detects the voltageV_(S+) of the first terminal S+ of the secondary winding, and providesthe voltage V_(S+) as the voltage detection signal V_(S1).

The resonant converter 300 has three types of operation considering theswitching frequency and the load: (1) the switching frequency is higherthan the first resonant frequency f_(r1) (2) the switching frequency islower than the first resonant frequency f_(r1) and higher than thesecond frequency f_(r2), the working mode is determined by the load; (3)the switching frequency is lower than the second resonant frequencyf_(r2).

FIGS. 5A-5C illustrate working waveform diagrams for the resonantconverter 300 shown in FIG. 4 under different operation types, accordingto an embodiment of the present invention. In detail, FIGS. 5A-5Cillustrate in turn the waveforms of the first control signal VG1, thesecond control signal VG2, the square wave signal Vd, the primary inputcurrent Ip, the current I_(M) flowing the second inductor L_(M), thesecondary input current Id and the voltage detection signal V_(S1)respectively, in different operation types. Wherein the first controlsignal VG1 and the second control signal VG2 are used to turn ON/OFF thehigh-side switch M1 and the low-side switch M2 respectively. Normally, apopular method used to prevent cross conduction of the high-side switchM1 and the low-side switch M2 is to provide a dead time between thefirst control signal VG1 and the second control signal VG2.

In the embodiment shown in FIGS. 5A-5C, the voltage detection signalV_(S1) is the voltage V_(S), of the first terminal S+ of the secondarywinding. At t1 time, the high-side switch M1 is turned OFF, thecapacitive mode judge circuit 305 compares the voltage detection signalV_(S1) with the voltage detection threshold V_(th) to judge the workingmode of the resonant converter 300. The judge law is: if V_(S1)>Vth att1 time, the capacitive mode judge circuit 305 provides a flag signal MChaving a first level that indicates the resonant converter 300 works inthe inductive mode. Otherwise, the flag signal MC has a second levelthat indicates the resonant converter 300 works in the capacitive mode.

In detail, as shown in FIG. 5A, the switching frequency of the resonantconverter 300 is higher than the first resonant frequency f_(r1). Theprimary input current Ip lags the square wave signal Vd, the resonantconverter 300 works in the inductive mode. According to the previousjudge law, the voltage detection signal V_(S1) is larger than thevoltage detection threshold V_(th) at t1 time, so the flag signal MC hasthe first level.

As shown in FIG. 5B, the switching frequency of the resonant converter300 is lower than the first resonant frequency f_(r1) and higher thanthe second resonant frequency f_(r2). The primary input current Ip lagsthe square wave signal Vd, the resonant converter 300 works the ininductive mode. According to the previous judge law, the voltagedetection signal V_(S1) is larger than the voltage detection thresholdV_(th) when the high-side switch M1 is turned OFF, so the flag signal MChas the first level.

As shown in FIG. 5C, the switching frequency of the resonant converter300 is lower than the second resonant frequency f_(r2). The primaryinput current Ip leads the square wave signal Vd, the resonant converter300 works in the capacitive mode. According to the previous judge law,the voltage detection signal V_(S1) is less than the voltage detectionthreshold V_(th) when the high-side switch M1 is turned OFF, so the flagsignal MC has the second level.

In the embodiments shown in FIGS. 5A-5C, the voltage detection signalV_(S1) is the voltage V_(S), of the first terminal S+ of the secondarywinding. In another embodiment, the voltage detection signal V_(S1) isthe voltage V_(S−) of the first terminal S− of the secondary winding.For simplicity, the operations of the above embodiments can be listed inthe following table with the reference FIGS. 5A-5C.

switching judge frequency f_(s) V_(S1) time V_(th) judge law MC f_(s) >f_(r1) eg1 V_(S+) t1 −0.95 Vo V_(S1) > V_(th)? First level f_(r2) <f_(s)< f_(r1) First level f_(s) < f_(r2) Second level f_(s) > f_(r1) eg2V_(S−) t1  0.95 Vo V_(S1) < V_(th)? First level f_(r2) < f_(s)< f_(r1)First level f_(s) < f_(r2) Second level

In the two embodiments shown in above table, based the comparison resultof the voltage detection signal V_(S1) and the voltage detectionthreshold V_(th), the capacitive or inductive mode of the resonantconverter can be detected. In different embodiments, both the voltagedetection threshold V_(th) and the judge law are different. The voltagedetection threshold V_(th) is dependent on the voltage detection signalV_(S1) and the judge law.

FIG. 6 illustrates a circuit diagram of a capacitive mode detectioncircuit used in the resonant converter 300 shown in FIG. 4 according toan embodiment of the present invention. In the embodiment shown in FIG.6, the rectifier network 403 comprises a bridge rectifier circuit and anoutput capacitor Co. The bridge rectifier circuit comprises fourrectifying diode D1-D4, wherein the anode of the first rectifying diodeD1 and the cathode of the third rectifying diode D3 are coupled to thefirst terminal S+ of the secondary winding, the cathode of the seconddiode D2 and the anode of the fourth rectifying diode D4 are coupled tothe second terminal S− of the secondary winding. The output capacitor Cohas a first terminal and a second terminal, wherein the first terminalis coupled to cathode of the first rectifying diode D1 and the cathodeof the fourth rectifying diode D4, the second terminal is coupled to theanode of the second rectifying diode D2, the anode of the thirdrectifying diode D3 and a secondary ground.

As shown in FIG. 6, the capacitive mode detection circuit comprises avoltage detection circuit 404 and a capacitive mode judge circuit 405.The voltage detection circuit 404 is coupled to the first terminal S+ ofthe secondary winding to detect the voltage V_(S), of the first terminalof the secondary winding. The voltage detection circuit 404 is furthercoupled to the output terminal of the rectifier network 403 to receivethe output DC voltage Vo and provides a voltage detection thresholdV_(th) based on the output DC voltage Vo. The voltage detection circuit404 comprises a first voltage divider 441 and the second voltage divider442. The first voltage divider 441 is coupled in parallel between thefirst terminal S+ of the secondary winding and the secondary ground, andcomprises the resistors Ra and Rb, the connection of which is shown inFIG. 6. The first voltage divider 441 is configured to provide thevoltage detection signal V_(S1) at its output terminal. The secondvoltage divider 442 is coupled to the output capacitor Co in paralleland comprises the resistors RA and RB, the connection of which is shownin FIG. 6. The second voltage divider 442 is configured to provide thevoltage detection threshold V_(th) at its output terminal

As shown in FIG. 6, The capacitive mode judge circuit 405 comprises afirst comparator CMP1, a first inverter N1 and a first rising edge Dflip-flop DA. The first comparator CMP1 has a non-inverting inputterminal, an inverting input terminal and an output terminal, whereinthe non-inverting input terminal is configured to receive the voltagedetection threshold V_(th), the inverting input terminal is configuredto receive the voltage detection signal V_(S1), the first comparatorCMP1 provides a first comparison signal at the output terminal. Thefirst inverter N1 has an input terminal and an output terminal, whereinthe input terminal is coupled to receive the first control signal VG1and provides the complementary signal of the first control signal VG1 atthe output terminal. The first rising edge D flip-flop DA has an inputreference terminal, an input clock terminal and an output terminal,wherein the input reference terminal is configured to receive the firstcomparison signal, the input clock terminal is coupled to the outputterminal of the first inverter N1, the first rising edge D flip-flop DAprovides the flag signal MC at the output terminal.

In the embodiment of shown in FIG. 6, the first voltage divider 441 isconfigured to provide the voltage detection signal V_(S1), whereinV_(S1)=K*V_(S), K is the division factor of the first voltage divider441. The voltage detection threshold V_(th) is set to a small signalthat is slightly higher than zero. In one embodiment, the voltagedetection threshold V_(th) is set to 0.05*K*Vo, wherein 0.05*K equals adivision factor of the second voltage divider 442.

FIG. 7 illustrates a circuit diagram of a capacitive mode detectioncircuit used in the resonant converter 300 shown in FIG. 4 according toanother embodiment of the present invention. The capacitive mode judgecircuit 405 shown in FIG. 6 and that shown in FIG. 7 has different judgetime. the former is turn-OFF time of the high-side switch M1, however,the latter is turn-OFF time of the low-side switch M2.

In the embodiment shown in FIG. 7, the capacitive mode judge circuit 505comprises a second comparator CMP2, a second inverter N2 and a secondrising edge D flip-flop DB. The second comparator CMP2 has anon-inverting input terminal, an inverting input terminal and an outputterminal, wherein the non-inverting input terminal is configured toreceive the voltage detection threshold V_(th), the inverting inputterminal is configured to receive the voltage detection signal V_(S1),the second comparator CMP2 provides a second comparison signal at theoutput terminal. The second inverter N2 has an input terminal and anoutput terminal, wherein the input terminal is coupled to receive thesecond control signal VG2 and provides the complementary signal of thesecond control signal VG2 at the output terminal. The second rising edgeD flip-flop DB has an input reference terminal, an input clock terminaland an output terminal, wherein the input reference terminal isconfigured to receive the second comparison signal, the input clockterminal is coupled to the output terminal of the second inverter N2,the second rising edge D flip-flop DB provides the flag signal MC at theoutput terminal. In the embodiment shown in FIG. 7, the voltagedetection threshold V_(th) is slightly lower than K*Vo, for example,0.95*K*Vo, wherein 0.95*K is the division factor of the second voltagedivider 442. The operations according to the above embodiments can belisted in the following table with the reference FIGS. 6˜7.

switching judge frequency f_(s) V_(S1) time V_(th) judge law MC f_(s) >f_(r1) eg3 V_(S+) t1 0.05 * K * Vo V_(S1) > V_(th)? 0 f_(r2) < f_(s)<f_(r1) 0 f_(s) < f_(r2) 1 f_(s) > f_(r1) eg4 V_(S−) t2 0.95 * K * VoV_(S1) < V_(th)? 0 f_(r2) < f_(s)< f_(r1) 0 f_(s) < f_(r2) 1

FIGS. 8A˜8C illustrate working waveform diagrams for the embodimentswith the reference in FIGS. 6 and 7 under different operation types,according to an embodiment of the present invention. In detail, FIGS.8A˜8C illustrate in turn the waveforms of the first control signal VG1,the second control signal VG2, the voltage of the secondary winding VSand the voltage detection signal V_(S1) respectively, in differentoperation types. The voltage threshold V_(th) is various with thevoltage detection signal V_(S1), the judge law and judge time.

FIG. 9 illustrates a circuit diagram of a capacitive mode detectioncircuit used in the resonant converter 300 shown in FIG. 4 according toyet another embodiment of the present invention. The embodiment shown inFIG. 9 is the combination of the capacitive mode judge circuit 405 andthe capacitive mode judge circuit 505, its operation is omitted forclarity.

FIG. 10 illustrates a circuit diagram of a resonant converter 700 withcapacitive mode detection, according to an embodiment of the presentinvention. The resonant converter 700 comprises a square wave signalgenerator 701, a resonant network 702, an isolated transformer T havinga primary winding and a secondary winding, a rectifier network 703, acapacitive mode detection circuit and a switching frequency controller706.

In the embodiment shown in FIG. 10, the square wave signal generator 701is built as half-bridge type and comprises a high-side switch M1 and alow-side switch M2 which are controlled respectively by a first controlsignal VG1 and a second signal VG2 with 50% duty cycle for each controlsignal. The resonant network 702 is coupled to the output terminal ofthe square wave signal generator 701 to receive the square wave signalVd. The resonant network 702 comprises a series resonant networkconsisting of a capacitor C_(S) and a first inductor L_(S), and theresonant frequency f_(r) of the resonant converter 700 is determined by:

$f_{r} = \frac{1}{2\pi \sqrt{L_{s}C_{s}}}$

As shown in FIG. 10, the secondary winding of the isolated transformer Thas a first terminal S+, a second terminal S− and a centered tap coupledto the ground. The rectifier network 703 comprises a full-wave rectifiercircuit and an output capacitor Co.

In the embodiment shown in FIG. 10, the capacitive mode detectioncircuit comprises a voltage detection circuit 704 and a capacitive modejudge circuit 705. The voltage detection circuit 704 comprises a firstvoltage divider 741 and a second voltage divider 742. The first voltagedivider 741 comprises resistors R1, R2 and R3. The first resistor R1 hasa first terminal and a second terminal, wherein the first terminal iscoupled to the first terminal S+ of the secondary winding. The secondresistor R2 has a first terminal and a second terminal, wherein thefirst terminal is coupled to the second terminal of the first resistorR1, the second terminal is coupled to the first terminal of the outputcapacitor Co. The third resistor R3 has a first terminal and a secondterminal, wherein the first terminal is couple to the second terminal ofthe first resistor R1, the second terminal is coupled to the secondaryground. The first voltage divider 741 provides the voltage detectionsignal V_(S1) at the first terminal of the second resistor R2. Thesecond voltage divider 742 is coupled in parallel with the outputcapacitor Co and comprises a fourth resistor R4 and a fifth resistor R5,the connection of which is shown in FIG. 10. The second voltage divider742 provides the voltage detection threshold V_(th) at its outputterminal. In one embodiment, the resistance of the first resistor R1 andthe second resistor R2 are equal, the resistance of the third resistorR3 and the fifth resistor R5 are equal, the resistance of the fourthresistor R4 is half of that of the first resistor R1. In otherembodiments, the above resistors have other appropriate relationships.The first voltage divider 741 is configured to detect the voltage of thesecondary winding and provide a DC voltage detection signal V_(S1) withthe amplitude of K1*Vo, wherein K1 is the division factor of the firstvoltage divider 741. The voltage detection threshold V_(th) is set to asmall signal that is slightly higher than zero. In one embodiment, thevoltage detection threshold V_(th) is set to 0.05*K1*Vo, wherein 0.05*K1equals the division factor of the second voltage divider 742.

The resonant converter 700 with the series resonant network 702 has twotypes of operation: (1) the switching frequency is higher than theresonant frequency f_(r); (2) the switching frequency is lower than theresonant frequency f_(r).

In the embodiment shown in FIG. 10, the capacitive mode judge circuit705 is designed to compare the voltage detection signal V_(S1) with thevoltage detection threshold V_(th) when the high-side switch M1 isturned OFF. The judge law is: if the voltage detection signal V_(S1) islarger than the voltage detection threshold V_(th), the flag signal MCprovided by the capacitive mode judge circuit has a first level andindicates the resonant converter 700 works in the inductive mode.Otherwise the voltage detection signal V_(S1) is less than the voltagedetection threshold V_(th), the flag signal MC has a second level,indicates the resonant converter 700 works in the capacitive mode.

FIGS. 11A and 11B illustrate working waveform diagrams for the resonantconverter 700 shown in FIG. 10 under different operation types,according to an embodiment of the present invention. In detail, FIGS.11A and 11B illustrate in turn the waveforms of the first control signalVG1, the second control signal VG2, the square wave signal Vd, theprimary input current Ip, the secondary input current Id, the voltageV_(S) of the secondary winding and the voltage detection signal V_(S1)respectively, in different operation types.

In detail, as shown in FIG. 11A, the switching frequency of the resonantconverter 700 is higher than the resonant frequency f_(r), the primaryinput current Ip lags the square wave signal Vd, the resonant converter700 works in the inductive mode. According to the previous judge law,the voltage detection signal V_(S1) is larger than the voltage detectionthreshold V_(th) when the high-side switch is turned OFF, and the flagsignal MC has the first level.

As shown in FIG. 11B, the switching frequency of the resonant converter700 is lower than the resonant frequency f_(r). The primary inputcurrent Ip leads the square wave signal Vd, the resonant converter 700works in the capacitive mode. According to the previous judge law, thevoltage detection signal V_(S1) is less than the voltage detectionthreshold V_(th) when the high-side switch M1 is turned OFF, and theflag signal MC has the second level.

FIG. 12 illustrates a working-flow diagram of a method 800 of capacitivemode detection used in a resonant converter according to an embodimentof the present invention. The resonant converter comprises a square wavegenerator having a first switch and a second switch, a resonant network,an isolated transformer having a primary winding and a second winding,and a rectifier network configured to provide an output DC voltage for aload, the method of capacitive mode detection comprises steps S801˜S804.

At step S801, a voltage of the secondary winding is detected and avoltage detection signal is generated based on the voltage of thesecondary winding.

At step S802, an output DC voltage is detected and a voltage detectionthreshold is generated based on the output DC voltage.

At step S803, the voltage detection signal is compared with the voltagedetection threshold when either of the first switch and the secondswitch is turned OFF.

At step S804, based on comparison result, a flag signal indicatingwhether the resonant converter enters into a capacitive mode isgenerated.

In detail, the secondary winding has a first terminal and a secondterminal. In one embodiment, the voltage of the secondary windingcomprises the voltage of the first terminal. In another embodiment, thevoltage of the secondary winding comprises the difference between thevoltage of the first terminal and second terminal of the secondarywinding.

Obviously many modifications and variations of the present invention arepossible in light of the above teachings. It is therefore to beunderstood that within the scope of the appended claims the inventionmay be practiced otherwise than as specifically described. It should beunderstood, of course, the foregoing invention relates only to apreferred embodiment (or embodiments) of the invention and that numerousmodifications may be made therein without departing from the spirit andthe scope of the invention as set forth in the appended claims. Variousmodifications are contemplated and they obviously will be resorted to bythose skilled in the art without departing from the spirit and the scopeof the invention as hereinafter defined by the appended claims as only apreferred embodiment(s) thereof has been disclosed.

What we claim is:
 1. A resonant converter, comprising: a square wavegenerator having a first switch and a second switch, wherein the firstswitch and the second switch are controlled by a first control signaland a second control signal respectively, the square wave generator isconfigured to convert an input direct current (DC) voltage into a squarewave signal according to switching operations of the first switch andthe second switch; a resonant network coupled to the square wavegenerator to receive the square wave signal; an isolated transformerhaving a primary winding and a secondary winding, wherein the primarywinding is coupled to the resonant network, the secondary winding has afirst terminal and a second terminal; a rectifier network coupled to thesecondary winding and configured to provide an output DC voltage for aload at its output terminal; a voltage detection circuit coupled to thesecondary winding to detect a voltage of the secondary winding andconfigured to provide a voltage detection signal based on the voltage ofthe secondary winding, the voltage detection circuit is further coupledto the output terminal of the rectifier network to receive the output DCvoltage and provides a voltage detection threshold based on the outputDC voltage; a capacitive mode judge circuit coupled to the voltagedetection circuit to receive the voltage detection signal and thevoltage detection threshold, wherein the capacitive mode judge circuitis configured to compare the voltage detection signal with the voltagedetection threshold at either of the first and the second switches isturned OFF and generates a flag signal indicating whether the resonantconverter enters into a capacitive mode based on the comparison result;and a switching frequency controller configured to generate the saidfirst and second control signals and coupled to the capacitive modejudge circuit to receive the flag signal, wherein the switchingfrequency controller is configured to increase the frequency of thefirst and the second control signals when the resonant converter entersinto the capacitive mode.
 2. The resonant converter of claim 1, whereinthe voltage of the secondary winding comprises the voltage of the firstterminal of the secondary winding.
 3. The resonant converter of claim 1,wherein the voltage of the secondary winding comprises the differencebetween the voltage of the first terminal and second terminal of thesecondary winding.
 4. The resonant converter of claim 1, wherein thesquare wave generator is built as a full-bridge type.
 5. The resonantconverter of claim 1, wherein the r square wave generator is built as ahalf-bridge type.
 6. The resonant converter of claim 1, wherein theresonant network comprises a capacitor, a first inductor and a secondinductor, wherein the second inductor is coupled to the primary windingin parallel.
 7. The resonant converter of claim 1, wherein the resonantnetwork comprises a capacitor and a first inductor, wherein thecapacitor, the first inductor and the primary winding are connected inseries.
 8. The resonant converter of claim 1, wherein the rectifiernetwork comprises: a bridge rectifier circuit having four rectifyingdiodes, wherein the anode of a first rectifying diode and the cathode ofa third rectifying diode are coupled to the first terminal of the secondwinding, the cathode of a second diode and the anode of the fourthrectifying diode are coupled to the second terminal of the secondarywinding; and an output capacitor having a first terminal and a secondterminal, wherein the first terminal is coupled to the cathode of thefirst rectifying diode and the cathode of the fourth rectifying diode,the second terminal is coupled to the anode of the second rectifyingdiode, the anode of the third rectifying diode and a secondary ground.9. The resonant converter of claim 8, wherein the voltage detectioncircuit comprises: a first voltage divider coupled in parallel betweenthe first terminal of the secondary winding and the secondary ground andconfigured to provide the voltage detection signal at its outputterminal; and a second voltage divider coupled to the output capacitorin parallel and configured to provide the voltage detection threshold atits output terminal.
 10. The resonant converter of claim 1, wherein thesecondary winding further comprises a center tap coupled to thesecondary ground; the rectifier network comprises: a full-wave rectifiercircuit comprises a first and a second rectifying diode, wherein theanode of the first rectifying diode is couple d to the first terminal ofthe first terminal of the secondary winding, the anode of the secondrectifying diode is coupled to the second terminal of the secondarywinding; and an output capacitor having a first terminal and a secondterminal, wherein the first terminal is coupled to the cathode of thefirst rectifying diode and the cathode of the second rectifying diode,the second terminal is coupled to the secondary ground.
 11. The resonantconverter of claim 10, wherein the voltage detection circuit comprises:a first voltage divider, comprising: a first resistor having a firstterminal and a second terminal, wherein the first terminal is coupled tothe first terminal of the secondary winding; a second resistor having afirst terminal and a second terminal, wherein the first terminal iscoupled to the second terminal of the first resistor, the secondterminal is coupled to the first terminal of the output capacitor; athird resistor having a first terminal and a second terminal, whereinthe first terminal is coupled to the second terminal of the firstresistor, the second terminal is coupled to the secondary ground, thefirst voltage divider provides the voltage detection signal at the firstterminal of the second resistor; and a second voltage divider coupled tothe output capacitor in parallel and configured to provide the voltagedetection threshold at its output terminal.
 12. The resonant converterof claim 1, wherein the capacitive mode judge circuit comprises: a firstcomparator having a non-inverting input terminal, an inverting inputterminal and an output terminal, wherein the non-inverting inputterminal is configured to receive the voltage detection threshold, theinverting input terminal is configured to receive the voltage detectionsignal, the first comparator provides a first comparison signal at theoutput terminal; a first inverter having an input terminal and an outputterminal, wherein the input terminal is coupled to receive the firstcontrol signal; and a first rising edge D flip-flop having an inputreference terminal, an input clock terminal and an output terminal,wherein the input reference terminal is configured to receive the firstcomparison signal, the input clock terminal is coupled to the outputterminal of the first inverter, the first rising edge D flip-flopprovides the flag signal at the output terminal.
 13. The resonantconverter of claim 1, wherein the capacitive mode judge circuitcomprises: a second comparator having a non-inverting input terminal, aninverting input terminal and an output terminal, wherein thenon-inverting input terminal is configured to receive the voltagedetection signal, the inverting input terminal is configured to receivethe voltage detection threshold, the second comparator provides a secondcomparison signal at the output terminal; a second inverter having aninput terminal and an output terminal, wherein the input terminal iscoupled to receive the second control signal; and a second rising edge Dflip-flop having an input reference terminal, an input clock terminaland an output terminal, wherein the input reference terminal isconfigured to receive the second comparison signal, the input clockterminal is coupled to the output terminal of the second inverter, thesecond rising edge D flip-flop provides the flag signal at the outputterminal.
 14. A capacitive mode detection circuit used in a resonantconverter, the resonant converter comprises a square wave generatorhaving a first switch and a second switch, a resonant network, anisolated transformer having a primary winding and a second winding, anda rectifier network configured to provide an output DC voltage for aload, the capacitive mode detection circuit comprises: a voltagedetection circuit coupled to the secondary winding to detect a voltageof the secondary winding and configured to provide a voltage detectionsignal based on the voltage of the secondary winding, the voltagedetection circuit is further coupled to the output terminal of therectifier network to receive the output DC voltage and provides avoltage detection threshold based on the output DC voltage; and acapacitive mode judge circuit coupled to the voltage detection circuitto receive the voltage detection signal and the voltage detectionthreshold, wherein the capacitive mode judge circuit is configured tocompare the voltage detection signal with the voltage detectionthreshold when either of the first and the second switches is turned OFFand generates a flag signal indicating whether the resonant converterenters into a capacitive mode based on the comparison result.
 15. Thecapacitive mode detection circuit of claim 14, wherein the secondarywinding has a first terminal and a second terminal, and the voltage ofthe secondary winding comprises the voltage of the second terminal ofthe secondary winding.
 16. The capacitive mode detection circuit ofclaim 14, wherein the secondary winding has a first terminal and asecond terminal, the voltage of the secondary winding comprises thedifference between the voltage of the first terminal and the secondterminal of the secondary winding.
 17. A method of capacitive modedetection used in a resonant converter, the resonant converter comprisesa square wave generator having a first switch and a second switch, aresonant network, an isolated transformer having a primary winding and asecond winding, and a rectifier network configured to provide an outputDC voltage for a load, the method comprises: detecting a voltage of thesecondary winding and generating a voltage detection signal based on thevoltage of the secondary winding; detecting an output DC voltage of therectifier network and generating a voltage detecting threshold based onthe output DC voltage; comparing the voltage detection signal with thevoltage detection threshold when either of the first and the secondswitches is turned OFF; and generating a flag signal indicating whetherthe resonant converter enters into a capacitive mode based on thecomparison result.
 18. The method of claim 17, wherein the secondarywinding has a first terminal and a second terminal, and the voltage ofthe secondary winding comprises the voltage of the first terminal of thesecondary winding.
 19. The method of claim 17, wherein the secondarywinding has a first terminal and a second terminal, the voltage of thesecondary winding comprises the difference between the voltage of thefirst terminal and second terminal of the secondary winding.